Regviz

Silicon Labs /BGM240PB32VNA /MODEM_NS /ADPC2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ADPC2

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/EFR32MG24A010F1536GM40/MODEM_S/ADPC2#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ADPCCORRSAMPLES0ADPCPRETIMINGBAUDS 0 (DISABLE)ADENCORR32 0ADPCSIGAMPTHR0ADPCWNDCNTRST

ADENCORR32=DISABLE

Description

No Description

Fields

ADPCCORRSAMPLES

ADPC correlation samples
ADPCPRETIMINGBAUDS

ADPC TIMINGBAUDS during PRE
ADENCORR32

ADPC enable correlators 16-31

0 (DISABLE): Disable corrleators 16-31

1 (ENABLE): Enable correlators 16-31
ADPCSIGAMPTHR

ADPC signal amplitude THR
ADPCWNDCNTRST

ADPC window cnt reset

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data